1. Field of the Invention
The present invention relates to a driving apparatus of a display panel having a capacitive light emitting display load, such as a plasma display panel (hereinafter, abbreviated to PDP) of the matrix display type and an EL (electroluminescence) display apparatus.
2. Description of the Related Art
PDPs have been studied extensively as a thin flat display apparatus, and a PDP of the matrix display type is known as one example.
FIG. 1 is a view schematically showing an arrangement of a PDP driving apparatus including the aforementioned PDP.
Referring to FIG. 1, a PDP 1 is provided with row electrodes Y1 through Yn and row electrodes X1 through Xn, wherein pairs of an electrode X and an electrode Y form row electrode pairs corresponding to respective rows (the first row through the n'th row) in one screen. Further, the PDP 1 is provided with column electrodes D1 through Dm, intersecting at right angles with the row electrode pairs with unillustrated dielectric layer and discharge space in between, that form column electrodes corresponding to respective columns (the first column through the m'th column) in one screen. Herein, a discharge cell corresponding to one pixel is formed at each intersection portion of each row electrode pair and each column electrode.
An address driver 2 converts pixel data for each pixel based on a video signal to a pixel data pulse having a voltage value corresponding to its logical level, and applies one row of pixel data pulses to the column electrodes D1 through Dm row by row.
An X row electrode driver 3 generates a reset pulse for initializing a quantity of residual wall charges in each discharge cell and a sustaining discharge pulse for sustaining a discharge-to-emit light condition of a light emitting discharge cell as will be described below, and applies these pulses to the row electrodes X1 through Xn.
Like the X row electrode driver 3, a Y row electrode driver 4 generates a reset pulse for initializing a quantity of residual wall charges in each discharge cell and a sustaining discharge pulse for sustaining a discharge-to-emit light condition of a light emitting discharge cell, and applies these pulses to the row electrodes Y1 through Yn. Further, the Y row electrode driver 4 generates a priming pulse (PP) for allowing charged particles generated within the discharge cell to be formed again and a scanning pulse (SP) for allowing a quantity of charges corresponding to the pixel data pulse to be generated in each discharge cell to set the light emitting discharge cell or a non-luminous discharge cell, and applies these pulses to the row electrodes Y1 through Yn.
FIG. 2 shows a concrete arrangement of the X row electrode driver 3, the Y row electrode driver 4, and the address driver 2, wherein the drivers are shown as to an electrode Xj, an electrode Yj, and an electrode Di for one pixel. The electrode Xj is the electrode in the j'th row among the electrodes X1 through Xn, and the electrode Yj is the electrode in the j'th row among the electrodes Y1 through Yn. A space between the electrode Xj and the electrode Yj functions as a capacitor C0. Also, the electrode Di is the electrode in the i'th column among the electrodes D1 through Dm.
The X row electrode driver 3 is provided with two power sources B1 and B2. The power source B1 outputs a voltage Vs1 (for example, 170 V), and the power source B2 outputs a voltage Vr1 (for example, 190 V). The positive terminal of the power source B1 is connected to a connection line 11 to the electrode Xj through a switching element S3, and the negative terminal is grounded. Connected somewhere between the connection line 11 and the ground are, in addition to a switching element S4, a series circuit composed of a switching element S1, a diode D1, and a coil L1, and another series circuit composed of a coil L2, a diode D2, and a switching element S2 through a common capacitor C1 at the ground side. The diode D1 is connected so that its anode is at the capacitor C1 side and the diode D2 is connected so that its cathode is at the capacitor C1 side. Also, the positive terminal of the power source B2 is connected to the connection line 11 through a switching element S8 and a resistor R1, and the negative terminal of the power source B2 is grounded.
The Y row electrode driver 4 is provided with four power sources B3 through B6. The power source B3 outputs a voltage Vs1 (for example, 170 V), the power source B4 outputs a voltage −Vr1 (for example, −190 V), the power source B5 outputs a voltage −Voff (for example, −10 to −20 V), and the power source B6 outputs a voltage Vh (for example, 160 V, Vh>Voff). The positive terminal of the power source B3 is connected to a connection line 12 to a switching element S15 through a switching element S13, and the negative terminal is grounded. A switching element S14 is connected between the connection line 12 and the ground. Also connected between the connection line 12 and the ground are, a series circuit composed of a switching element S11, a diode D3, and a coil L3, and another series circuit composed of a coil L4, a diode D4 and a switching element S12 through a common capacitor C2 at the ground side. The diode D3 is connected in a direction that its anode is on the capacitor C2 side and the diode D4 is connected in a direction that its cathode is on the capacitor C2 side.
The connection line 12 is connected to a connection line 13 to the negative terminal of the power source B6 through the switching element S15. The positive terminal of the power source B4 is grounded, and the negative terminal is connected to the connection line 13 through a switching element S16 and a resistor R2. The negative terminal of the power source B5 is connected to the connection line 13 through a switching element S17, and the positive terminal is grounded.
Also, the connection line 13 is connected to a connection line 14 to the electrode Yj through a switching element S22. The positive terminal of the power source B6 is connected to the connection line 14 through a switching element S21. A diode D6 is connected somewhere between the connection lines 13 and 14, and a diode D5 is connected somewhere between the positive terminal of the power source B6 and the connection line 14 in parallel. The diode D5 is connected in a direction that its anode is on the connection line 14 side, and the diode D6 is connected in a direction that its cathode is on the connection line 14 side.
The address driver 2 is provided with a power source B7 that outputs a voltage Vd (for example, 60 V). The positive terminal of the power source B7 is connected to the electrode Di through a switching element S33, a connection line 15, and a switching element S35, and the negative terminal is grounded. A switching element S34 is connected between the connection line 15 and the ground. Also connected between the connection line 15 and the groundare, a series circuit composed of a switching element S31, a diode D7 and a coil L5, and another series circuit composed of a coil L6, a diode D8, and a switching element S32 through a common capacitor C3 at the ground side. The diode D7 is connected in a direction that its anode is on the capacitor C3 side and the diode D8 is connected in a direction that its cathode is on the capacitor C3 side.
Also, the electrode Di is grounded through a switching element S36. Incidentally, the switching elements S35 and S36 operate alternately, and control generation of an address data pulse to be supplied to the capacitor C0 in the discharge cell unit.
In the circuitry of FIG. 2, the capacitors C1, C2, and C3 (hereinafter, referred to as the power collecting capacitors) included in the X row electrode driver 3, the Y row electrode driver 4, and the address driver 2, respectively, are connected to power sources B8, B9, and B10 through resistors R10, R20, and R30, respectively, only for a predetermined period upon power-up of the PDP apparatus. These power sources charge their respective power collecting capacitors to midpoint potentials of their respective resonance voltages. The potentials of the power sources B8 and B9 are half the aforementioned Vs1, that is, Vs1/2, and the potential of the power source B10 is half the aforementioned Vd, that is, Vd/2.
The ON/OFF operations of the switching elements S1 through S4, S8, S11 through S17, S21 and S22, and S31 through S36 included in theses drivers are controlled by an unillustrated control circuit. Incidentally, an arrow at each switching element in FIG. 2 indicates a control signal terminal from the control circuit.
Herein, in the Y row electrode driver 4, the power source B3, the switching elements S11 through S15, the coils L3 and L4, the diodes D3 and D4, and the capacitor C2 form a sustaining driver (sustaining discharge driving); the power source B4, the resistor R2, and the switching element S16 form a reset driver; and the rest of the power sources B5 and B6, the switching elements S17, S21, and S22, and the diodes D5 and D6 form a scanning driver (scanning driving).
Next, the following description will describe an operation of the above-arranged PDP driving circuit with reference to the timing chart of FIG. 3. The operation of the PDP driving apparatus is mainly composed of a reset period, an address period, and a sustain period.
Initially, when the PDP driving circuit enters the reset period, the switching element S8 in the X row electrode driver 3 is switched ON, and both the switching elements S16 and S22 in the Y row electrode driver 4 are switched ON. At this point, all the other switching elements stay OFF.
When the switching element S8 is switched ON, a current starts to flow from the positive terminal of the power source B2 to the electrode Xj through the switching element S8 and the resistor R1. Also, when the switching elements S16 and S22 are switched ON, a current flows into the negative terminal of the power source B4 from the electrode Yj through the switching element S22, the resistor R2, and the switching element S16. A potential of the electrode Xj increases gradually because of a time constant of the capacitor C0 and the resistor R1 and becomes a reset pulse PRx, while the potential of the electrode Yj decreases gradually because of a time constant of the capacitor C0 and the resistor R2 and becomes a reset pulse PRy. A peak-to-peak value of the reset pulse PRx becomes the voltage Vr1 of the power source B2 in the end, while the peak-to-peak value of the reset pulse PRy becomes the voltage −Vr1 of the power source B4. The reset pulse PRx is applied to all the electrodes X1 through Xn concurrently, and likewise, the reset pulse PRy is generated for each of the electrodes Y1 through Yn and applied to all the electrodes Y1 through Yn concurrently.
By applying these reset pulses RPx and RPy concurrently, all the discharge cells in the PDP 1 are excited to discharge, whereby charged particles are generated. When the discharge ends, wall charges of a predetermined quantity are formed uniformly on the dielectric layers in all the discharge cells.
The switching elements S8, S16, and S22 are switched OFF after the reset pulses PRx and PRy reach the saturation level and before the reset period ends. At this point, the switching elements S4, S14, and S15 are switched ON, and both the electrodes Xj and Yj are grounded, whereupon the reset pulses PRx and PRy are lost. The PDP driving circuit operates as has been described during the reset period.
Subsequently, when the address period starts, the switching elements S14 and S15 are switched OFF and the switching element S17 is switched ON, and at the same time, the switching element S22 is switched ON. When the switching elements S17 and S22 are switched ON, the negative potential −Voff at the negative terminal of the power source B5 is applied to the electrode Yj through the switching element S17 and the switching element S22.
During the address period, the address driver 2 converts the pixel data for each pixel based on a video signal to pixel data pulses DP1 through DPn each having a voltage value corresponding to their respective logical levels, and successively applies one row of the data pulses to the column electrodes D1 through Dm. For example, as shown in FIG. 3, the pixel data pulses DPj and DPj+1 are applied to the electrodes Yj and Yj+1.
On the other hand, during the address period, the Y row electrode driver 4 successively applies the priming pulse (PP) of a positive voltage to the row electrodes Y1 through Yn. Further, the Y row electrode driver 4 successively applies the scanning pulse (SP) of a negative voltage to the row electrodes Y1 through Yn immediately after each is applied with the priming pulse (PP) and in synchronism with the timing of each pulse in a group of the pixel data pulses DP1 through DPn.
The following description will describe the above operation in terms of the Y row electrode driver 4. That is, the switching element S21 is switched ON and the switching element S22 is switched OFF when the priming pulse (PP) is generated. On the other hand, the switching element S17 stays ON. Consequently, the power source B6 and the power source B5 are connected in series through the switching element S17, whereby (Vh−Voff) (for example, 160 V−20 V=140 V) is given as the potential at the positive terminal of the power source B6. The resulting positive potential is applied to the electrode Yj through the switching element S21 as the priming pulse (PP).
After the priming pulse (PP) is applied, the switching pulse S21 is switched OFF in synchronism with the application of the pixel data pulse DPj from the address driver 2, whereupon the switching element S22 is switched ON. Consequently, the negative potential −Voff at the negative terminal of the power source B5 is applied to the electrode Yj through the switching element S17 and then the switching element S22 as the scanning pulse (SP). Subsequently, the switching element S21 is switched ON at the same time when the application of the pixel data pulse DPj from the address driver 2 is stopped, whereupon the switching element S22 is switched OFF. As a consequence, the potential (Vh−Voff) at the positive terminal of the power source B6 is applied to the electrode Yj through the switching element S21. Then, as shown in FIG. 3, the priming pulse (PP) is applied to the electrode Yj+1 in the (j+1)'th row in the same manner as the electrode Yj, and the scanning pulse (SP) is applied in synchronism with the application of the pixel data pulse DPj+1 from the address driver 2.
Of all the discharge cells belonging to the row electrodes to which the scanning pulse (SP) is applied, those to which the pixel data pulse DP of a positive voltage is applied concurrently will start to discharge, so that these discharge cells lose most of the wall charges. On the other hand, the discharge cells to which the scanning pulse (SP) is applied but the pixel data pulse of a positive voltage is unapplied will not start to discharge, so that these discharge cells hold the residual wall charges. Herein, the discharge cells holding the residual wall charges become the light emitting discharge cells, and the discharge cells having lost the wall charges become the non-luminous discharge cells. The PDP driving circuit operates as has been described during the address period.
Next, the following description will describe an operation during the sustain period.
In the Y row electrode driver 4, the switching elements S17 and S21 are switched OFF, and in turn, the switching elements S14 and S15 are switched ON when the address period shifts to the sustain period.
On the other hand, in the X row electrode driver 3, the switching element S4 stays ON since the preceding address period, and the potential of the electrode Xj is the ground potential at almost 0 V. Then, the switching element S4 is switched OFF, and the switching element S1 is switched ON, whereupon a current reaches the electrode Xj through the coil L1, the diode D1, and the switching element S1 due to the charges accumulated in the capacitor C1, and the current flows into the capacitor C0, whereby the capacitor C0 is charged. At this point, as shown in FIG. 3, the potential of the electrode Xj increases gradually because of a time constant of the coil L1 and the capacitor C0.
Then, the switching element S1 is switched OFF, and the switching element S3 is switched ON. Consequently, the potential Vs1 at the positive terminal of the power source B1 is applied to the electrode Xj. Subsequently, the switching element S3 is switched OFF, and the switching element S2 is switched ON, whereupon a current flows into the capacitor C1 from the electrode Xj through the coil L2, the diode D2, and the switching element S2 due to the charges accumulated in the capacitor C0.
At this point, as shown in FIG. 3, the potential of the electrode Xj decreases gradually because of a time constant of the coil L2 and the capacitor C1. When the potential of the electrode Xj decreases to almost 0 V, the switching element S2 is switched OFF, and the switching element S4 is switched ON, whereupon the capacitor C0 is grounded.
According to a series of these operations, the X row electrode driver 3 applies a sustaining discharge pulse IPx of a positive voltage as shown in FIG. 3 to the electrode Xj.
In the Y row electrode driver 4, when the switching element S4 is switched ON, at which the sustaining discharge pulse IPx is lost, the switching element S11 is switched ON and the switching element S14 is switched OFF concurrently. The potential of the electrode Yj is the ground potential at almost 0 V while the switching element S14 stays ON. However, when the switching element S14 is switched OFF and the switching element S11 is switched ON, a current reaches the electrode Yj through the coil L3, the diode D3, the switching element S11, the switching element S15, and the diode D6 due to the charges accumulated in the capacitor C2, and the current flows into the capacitor C0, whereby the capacitor C0 is charged. At this point, as shown in FIG. 3, the potential of the electrode Yj increases gradually because of a time constant of the coil L3 and the capacitor C0.
Then, the switching element S11 is switched OFF and the switching element S13 is switched ON. Consequently, the potential Vs1 at the positive terminal of the power source B3 is applied to the electrode Yj through the switching element S13, the switching element S15, and the diode D6. Subsequently, the switching element S13 is switched OFF and the switching element S12 is switched ON, and further, the switching element S22 is switched ON. Consequently, a current flows into the capacitor C2 from the electrode Yj through the switching element S22, the switching element S15, the coil L4, the diode D4, and the switching element S12 due to the charges accumulated in the capacitor C0. At this point, as shown in FIG. 3, the potential of the electrode Yj decreases gradually because of a time constant of the coil L4 and the capacitor C2. When the potential of the electrode Yj decreases to almost 0 V, the switching elements S12 and S22 are switched OFF and the switching element S14 is switched ON.
According to the above operation, the Y row electrode driver 4 applies a sustaining discharge pulse IPy of a positive voltage as shown in FIG. 3 to the electrode Yj.
As has been described, during the sustain period, the sustaining discharge pulse IPx and the sustaining discharge pulse IPy are generated alternately, and respectively applied to the electrodes X1 through Xn and the electrodes Y1 through Yn alternately. Hence, the light emitting discharge cells holding the residual wall charges repeat the discharge to emit light with the application of the sustaining discharge pulse voltage, thereby sustaining the light emitting condition.
The above description described an operation of the so-called normal display driving sequence composed of the reset period, the address period, and the sustain period in the PDP driving apparatus/driving circuit shown in FIGS. 1 and 2.
Incidentally, according to the conventional PDP driving apparatus, it is necessary to charge the power collecting capacitors (C1 through C3) in their respective resonance drivers shown in FIG. 2 to predetermined potentials upon power-up of the apparatus before the display driving sequence starts. In other words, if the aforementioned display driving sequence is started while the potentials of these capacitors are 0, the operation may possibly cause a problem because of a potential difference within the resonance circuits. Hence, it is necessary to charge these capacitors to around the midpoint potentials of the resonance voltages in their respective resonance driver circuits after the PDP driving apparatus is turned ON and before the aforementioned display driving sequence is started.
For this reason, according to the conventional apparatus, as shown in FIG. 2, all the resonance drivers are provided with the power sources B8 through B10, respectively, for charging the power collecting capacitors, and the respective capacitors C1 through C3 are charged directly to the midpoint potentials (Vs1/2 or Vd/2) of the resonance voltages from these power sources through the resistors R10, R20, and R30, respectively.
According to this method, however, the capacitors need to be charged through a series resistor having a relatively large resistance value to control a rush current upon power-up of the apparatus. Hence, there is a problem that the charging of these capacitors is time-consuming, and it takes a time until an image is displayed by shifting to the normal display driving sequence since the power-up of the apparatus.